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Cadence Design Systems, Inc. is an American multinational technology and computational software company. Headquartered in San Jose, California, Cadence was formed in 1988 through the merger of SDA Systems and ECAD.

Software R&D Intern, Summer

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence is looking for an intern to develop algorithms in the physical design space.

 

The candidate should have a master’s degree and be pursuing a Ph.D. in algorithms for physical design IC tools. The candidate should have expertise on some set of physical synthesis problems such as placement, routing, clock tree synthesis, buffering, gate sizing, or logic optimization.

 

The candidate should be a strong coder and be able to quickly prototype and test algorithms. An established publication record is preferable.The Position Requirements are…Must be currently enrolled in a PhD or 2nd year MS program, with a primary research focus on VLSI CAD algorithm development.

We’re doing work that matters. Help us solve what others can’t.

Lead Software Engineer

The Cadence Digital and Signoff Group Machine learning team is a high energy team which explores and implements Deep and Machine Learning techniques to Electronic Design Automation [EDA] tools. We are looking for exceptional individuals skilled in ML and Deep-Learning algorithms, frameworks and application development. In addition, we desire a team player with excellent communication skills who is as comfortable discussing Deep Learning research as with developing APIs to innovative new software.

 

Primary responsibilities include designing gradient based and gradient free optimization algorithms, researching and developing Machine Learning approaches to problems in the EDA and system design, as well as designing, implementing, verifying and maintaining software to address those markets. The ability to interact with a worldwide cross-functional team and collaborate productively is a necessity. A strong software engineering background is mandatory with emphasis on C/C++, Python, Linux-based development and ML/DL frameworks like Sci-kit learn and Tensorflow/Keras.

 

Minimum requirements: BS +4 years or MS +2 years

The annual salary range for California is $110,600 to $205,400. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

Cloud Engineer

This role requires developing a best-of-breed platform for Cadence Cloud offerings, providing customers one-stop to get to know everything and anything related to customer cloud presence in the Cadence environment, making it easy to self-manage and easy to perform. The role requires interaction with core cloud developers and R&D team, building a scalable solution. Those ready to take up the challenge and believe in building state of the art solutions are encouraged to apply!

 

Full stack developer with 5 -7 years of experience with more than three years of working experience building complex applications on Angular, Javascript, CSS, HTML5, Node.js, Java, Spring Boot, Mysql, or relational database.

  • Must be familiar with Single Page applications, building front end using leveraging latest frameworks and front-end technologies
  • Candidate must have hands-on experience with the development, unit, and integration testing.
  • Must be able to come up with an integration approach while working in multi-application having data sharing  in real and batch mode
  • Must have a strong working knowledge of Java, microservices, RestAPIs, and development platforms like SpringBoot.
  • Must be comfortable working on a Linux environment, with an understanding of basic Linux commands
  • Must be very comfortable with web frameworks and protocols and their behavior.
  • Must have some working experience on a public cloud like AWS, Azure or GCP, must have worked on its services like computing, storage, security policy, and IaaS  via APIs
  • Must have worked on the deployments and understanding of CI/CD pipeline

Lead Software Engineer, Synthesis

Cadence Design Systems is looking for a highly motivated software engineer to work as a member of the R&D staff on Cadence’s Genus Synthesis Solution product.  Genus is a complete product that encompasses logic synthesis and physical design.  The product breadth means we are looking for skilled and motivated candidates with backgrounds in logic synthesis, word-level synthesis, static timing analysis, computer architecture, verification, RTL compilation, placement, power analysis, routing, extraction, and optimization.  You will be part of a team responsible for creating the innovative technologies required for technology leadership in this space.  Development responsibilities include designing, developing, troubleshooting, debugging and supporting the Genus software product.

 

Job Duties:

  • Begins to look beyond “bugs” within code and recommends enhancements to improve customer products
  • Writes code to specifications based on objectives and works within parameters provided; makes recommendations for improvements
  • Analyzes and evaluates bugs and makes recommendations under time pressure within general parameters under broad supervision
  • Analyzes design and determines coding, programming, and integrating activities required based on general objectives and knowledge of overall architecture of product or solution
  • Provides general support to team

 

Position Requirements:
The successful candidate will possess the following combination of education and experience:
• MS in Computer Science or Electrical Engineering, PhD is preferred
• Proficient in C/C++
• Excellent programming and software engineering skills

• Strong ability to learn
• Strong analysis and problem solving skills
• Good communication skill is preferred as the development team is distributed

Analog Custom Layout Principal Application Engineer

Position Description:

Your role will be to meet customers/prospects and identify & qualify the opportunities, work out agreeable and achievable evaluation criteria, run through the evaluation and convert the opportunities into business leading to deployment of an efficient analog and mixed signal methodology using Cadence tools (Virtuoso). It requires a very good understanding of customer flow & challenges and a good analytical ability to resolve issues impacting production schedule. Hands–on knowledge / experience on analog and mixed-signal physical Design / Debug /would be a plus.

The role demands a close interaction with R&D and Product Engineering team for implementation of new features and bug fixes.

As the job requires an extensive interaction with customers for issue resolution and identifying opportunities to proliferate Cadence technologies, at the same time a closer interaction with R&D and other stakeholders, it demands an excellent customer and communication skills, and the leadership qualities.

Position Requirements:

This position requires a solid understanding of IC design process/methodology in analog and mixed-signal design. The candidate should have in-depth knowledge and hands-on experience of complete analog Back-end flow from design entry, Basic layout editing to advance automation flows specially with experience in advance process nodes , physical verification. with proficiency in tools like Virtuoso Schematic, Virtuoso layout, Pegasus, etc.

B.Tech or equivalent with 4 to 10 years of relevant experience.

Qualifications

Bachelor’s Degree in; Electrical / Electronics / Electronics and Communication / VLSI Engineering with 5 to 10 years

Skill programming knowledge is a plus.

Updated: November 13, 2024 — 8:54 am

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